document number: 91324 www.vishay.com s-81292-rev. a, 16-jun-08 1 power mosfet irlr120, irlu120, sihlr120, sihlu120 vishay siliconix features ? dynamic dv/dt rating ? repetitive avalanche rated ? surface mount (irlr120/sihlr120) ? straight lead (irlu120/sihlu120) ? available in tape and reel ? logic-level gate drive ?r ds(on) specified at v gs = 4 v and 5 v ? lead (pb)-free available description third generation power mosfet s from vishay provide the designer with the best combi nation of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. the dpak is designed for su rface mounting using vapor phase, infrared, or wave soldering techniques. the straight lead version (irlu/sihlu series) is for through-hole mounting applications. power dissipation levels up to 1.5 w are possible in typical surface mount applications. note a. see device orientation. notes a. repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. v dd = 25 v, starting t j = 25 c, l = 5.3 mh, r g = 25 , i as = 7.7 a (see fig. 12). c. i sd 9.2 a, di/dt 110 a/s, v dd v ds , t j 150 c. d. 1.6 mm from case. e. when mounted on 1" square pcb (fr-4 or g-10 material). product summary v ds (v) 100 r ds(on) ( )v gs = 5.0 v 0.27 q g (max.) (nc) 12 q gs (nc) 3.0 q gd (nc) 7.1 configuration single n - c hannel m os fet g d s dpak (to-252) ipak (to-251) a v aila b le rohs* compliant ordering information package dpak (to-252) dpak (to-252) d pak (to-252) dpak (to-252) ipak (to-251) lead (pb)-free irlr120pbf irlr120trlpbf a irlr120trpbf a irlr120trrpbf a irlu120pbf SIHLR120-E3 sihlr120tl-e3 a sihlr120t-e3 a sihlr120tr-e3 a sihlu120-e3 snpb irlr120 irlr120trl a irlr120tr a -- sihlr120 sihlr120tl a sihlr120t a -- absolute maximum ratings t c = 25 c, unless otherwise noted parameter symbol limit unit drain-source voltage v ds 100 v gate-source voltage v gs 10 continuous drain current v gs at 5.0 v t c = 25 c i d 7.7 a t c = 100 c 4.9 pulsed drain current a i dm 31 linear derating factor 0.33 w/c linear derating factor (pcb mount) e 0.020 single pulse avalanche energy b e as 210 mj repetitive avalanche current a i ar 7.7 a repetitive avalanche energy a e ar 4.2 mj maximum power dissipation t c = 25 c p d 42 w maximum power dissipation (pcb mount) e t a = 25 c 2.5 peak diode recovery dv/dt c dv/dt 5.5 v/ns operating junction and storage temperature range t j , t stg - 55 to + 150 c soldering recommendations (p eak temperature) for 10 s 260 d * pb containing terminations are not rohs compliant, exemptions may apply
www.vishay.com document number: 91324 2 s-81292-rev. a, 16-jun-08 irlr120, irlu120, sihlr120, sihlu120 vishay siliconix note a. when mounted on 1" square pcb (fr-4 or g-10 material). notes a. repetitive rating; pulse width limited by maximum junction temper ature (see fig. 11). b. pulse width 300 s; duty cycle 2 %. thermal resistance ratings parameter symbol min. typ. max. unit maximum junction-to-ambient r thja - - 110 c/w maximum junction-to-ambient (pcb mount) a r thja --50 maximum junction-to-case (drain) r thjc --3.0 specifications t j = 25 c, unless otherwise noted parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = 250 a 100 - - v v ds temperature coefficient v ds /t j reference to 25 c, i d = 1 ma - 0.13 - v/c gate-source threshold voltage v gs(th) v ds = v gs , i d = 250 a 1.0 - 2.0 v gate-source leakage i gss v gs = 10 v - - 100 na zero gate voltage drain current i dss v ds = 100 v, v gs = 0 v - - 25 a v ds = 80 v, v gs = 0 v, t j = 125 c - - 250 drain-source on-state resistance r ds(on) v gs = 5.0 v i d = 4.6 a b - - 0.27 v gs = 4.0 v i d = 3.9 a b - - 0.38 forward transconductance g fs v ds = 50 v, i d = 4.6 a b 4.4 - - s dynamic input capacitance c iss v gs = 0 v, v ds = 25 v, f = 1.0 mhz, see fig. 5 - 490 - pf output capacitance c oss - 150 - reverse transfer capacitance c rss -30- total gate charge q g v gs = 5.0 v i d = 9.2 a, v ds = 80 v, see fig. 6 and 13 b --12 nc gate-source charge q gs --3.0 gate-drain charge q gd --7.1 turn-on delay time t d(on) v dd = 50 v, i d = 9.2 a, r g = 9.0 , r d = 5.2 , see fig. 10 b -9.8- ns rise time t r -64- turn-off delay time t d(off) -21- fall time t f -27- internal drain inductance l d between lead, 6 mm (0.25") from package and center of die contact c -4.5- nh internal source inductance l s -7.5- drain-source body diode characteristics continuous source-drain diode current i s mosfet symbol showing the integral reverse p - n junction diode --7.7 a pulsed diode forward current a i sm --31 body diode voltage v sd t j = 25 c, i s = 7.7 a, v gs = 0 v b --2.5v body diode reverse recovery time t rr t j = 25 c, i f = 9.2 a, di/dt = 100 a/s b - 110 140 ns body diode reverse recovery charge q rr - 0.80 1.0 c forward turn-on time t on intrinsic turn-on time is neglig ible (turn-on is dominated by l s and l d ) d s g s d g
document number: 91324 www.vishay.com s-81292-rev. a, 16-jun-08 3 irlr120, irlu120, sihlr120, sihlu120 vishay siliconix typical characteristics 25 c, unless otherwise noted fig. 1 - typical output characteristics, t c = 25 c fig. 2 - typical output characteristics, t c = 150 c fig. 3 - typical transfer characteristics fig. 4 - normalized on-resistance vs. temperature
www.vishay.com document number: 91324 4 s-81292-rev. a, 16-jun-08 irlr120, irlu120, sihlr120, sihlu120 vishay siliconix fig. 5 - typical capacitance vs. drain-to-source voltage fig. 6 - typical gate charge vs. gate-to-source voltage fig. 7 - typical source-drain diode forward voltage fig. 8 - maximum safe operating area
document number: 91324 www.vishay.com s-81292-rev. a, 16-jun-08 5 irlr120, irlu120, sihlr120, sihlu120 vishay siliconix fig. 9 - maximum drain current vs. case temperature fig. 10a - switching time test circuit fig. 10b - switching time waveforms fig. 11 - maximum effective transient thermal impedance, junction-to-case p u lse w idth 1 s d u ty factor 0.1 % r d v gs r g d.u.t. 5.0 v + - v ds v dd v ds 90 % 10 % v gs t d(on) t r t d(off) t f
www.vishay.com document number: 91324 6 s-81292-rev. a, 16-jun-08 irlr120, irlu120, sihlr120, sihlu120 vishay siliconix fig. 12a - unclamped inductive test circuit fig. 12b - unclamped inductive waveforms fig. 12c - maximum avalanche energy vs. drain current fig. 13a - basic gate charge waveform fig. 13b - gate charge test circuit r g i as 0.01 t p d.u.t l v ds + - v dd 5.0 v v ary t p to o b tain re qu ired i as i as v ds v dd v ds t p q gs q gd q g v g charge v gs d.u.t. 3 ma v gs v ds i g i d 0.3 f 0.2 f 50 k 12 v c u rrent reg u lator c u rrent sampling resistors same type as d.u.t. + -
document number: 91324 www.vishay.com s-81292-rev. a, 16-jun-08 7 irlr120, irlu120, sihlr120, sihlu120 vishay siliconix fig. 14 - for n-channel vishay siliconix maintains worldwide manufacturing capability. pr oducts may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91324. p. w . period di/dt diode reco v ery d v /dt ripple 5 % body diode for w ard drop re-applied v oltage re v erse reco v ery c u rrent body diode for w ard c u rrent v gs = 10 v * v dd i sd dri v er gate dri v e d.u.t. i sd w a v eform d.u.t. v ds w a v eform ind u ctor c u rrent d = p. w . period + - + + + - - - * v gs = 5 v for logic le v el de v ices peak diode recovery dv/dt test circuit v dd ? d v /dt controlled b y r g ? dri v er same type as d.u.t. ? i sd controlled b y d u ty factor "d" ? d.u.t. - de v ice u nder test d.u.t circ u it layo u t considerations ? lo w stray ind u ctance ? gro u nd plane ? lo w leakage ind u ctance c u rrent transformer r g
document number: 91000 www.vishay.com revision: 18-jul-08 1 disclaimer legal disclaimer notice vishay all product specifications and data are subject to change without notice. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, ?vishay?), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. vishay disclaims any and all li ability arising out of the use or application of any product describ ed herein or of any information provided herein to the maximum extent permit ted by law. the product specifications do not expand or otherwise modify vishay?s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of vishay. the products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. customers using or selling vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify vishay for any damages arising or resulting from such use or sale. please contact authorized vishay personnel to obtain written terms and conditions regarding products designed for such applications. product names and markings noted herein may be trademarks of their respective owners.
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